The present invention relates generally to signal processors and more specifically to a transimpedance processor which converts low level photocurrents into voltage levels and processes these signals for improved signal detection.
Current state of the art realizes the transimpedance (TIA) function with the reset integrator shown in FIG. 1. Transimpedance gain is a function of integrate time and capacitor size given by: EQU G=to/C, to =Integrate time.
The current method of signal processing involves following the TIA with cascaded highpass and lowpass filters to remove undesirable noise and background contamination. A block diagram of this technique is shown in FIG. 2. A problem with this technique is that in cases where large dc currents exist at the detector output (background contamination), dynamic range at the output of the TIA is severely limited for ac signals of interest. Further l/f noise of the amplifier is multiplied by the ratio Cs/C which further degrades performance.
Thus, it is an object of the present invention to improve the dynamic range.
Another object of the present invention is to reduce the output noise due to l/f noise of the amplifier.
Still another object of the present invention is to provide a dc signal which arises from the background, as well as the ac data of interest.
A further object of the present invention is to provide the dc signal without compromising the ac signals' dynamic range which the existing art is not capable of providing.
These and other objects are achieved by a feedback circuit for generating a voltage as a function of the input background level and precharging the capacitor of the input integrator to a negative of the generated voltage in a precharge cycle. A sample and hold network, which may include a lowpass filter, is connected to the output of the input integrator and samples and holds the output thereof. The feedback precharge circuit includes an integrator to integrate the outputs of the sample and hold. A switching arrangement connects the output of the precharge integrator to a first terminal of the capacitor of the input integrator which is connected to the output of the input integrator during a precharge cycle and connects the first terminal to the output of the input integrator during a measurement cycle.
The sample and hold circuit includes a second capacitor having a first terminal connected to the output of the input integrator during a measurement cycle and connected to a reference terminal, for example ground, during the precharge cycle. The precharge integrator includes an input capacitor having a first terminal connected to the input of a precharge integrator and a second terminal connected to the output of the sample and hold to charge the input capacitor during a portion of a cycle and being connected to the reference terminal or ground during another portion of the cycle to discharge the input capacitor. The precharge integrator includes an amplifier having a feedback capacitor having one terminal connected to the amplifier's input and a second terminal connected to the amplifier's output through a switch which is normally closed and is open while the input capacitor is being discharged. Another switch connects the input of the precharge amplifier to its output when the input capacitor is being discharged.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.